/* -*- mode:c++; indent-tabs-mode: nil -*-
 * Copyright (c) 2007, Technische Universitaet Berlin
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/**
 * Specify the target cpu clock speed of your platform by overriding this file.
 *
 * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz.  Some
 * platforms have an external high frequency oscilator to generate the SMCLK
 * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These
 * oscillators provide metric frequencies, but may not run in power down
 * modes. Here, we need to switch the SMCLK source, which is easier if
 * the external and thd DCO source frequency are the same.
 * 
 * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
 */


#ifndef MS430DCOSPEC_H
#define MS430DCOSPEC_H

#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz
#define ACLK_KHZ 32 // the ACLK rate in binary kHz
#endif
